1. Field of the Invention
This invention relates to a process for forming, in one or more vias in an insulating layer of an integrated circuit structure, an aluminum plug; and then forming a patterned metal layer over the insulating layer in electrical communication with the aluminum plug.
2. Description of the Related Art
Aluminum has been used for a number of years as interconnect material, as well as a filler material for vias in an insulating layer to provide electrical communication to either another metal interconnect layer or to underlying integrated circuit structure, e.g. , between different levels of interconnects or to contacts of an active device such as a bipolar or MOS transistor.
However, the problem of spiking, which occurs when silicon migrates into the aluminum, has led to the use of an electrically conductive barrier layer in the via, such as a refractory metal which is formed over exposed portions of underlying silicon at the bottom of the via. However this further reduces the size of the via, making it more difficult to fill the remainder of the via volume with aluminum, especially with the concurrent reduction in the geometries of integrated circuit structures. This, in turn, has led to the use of other filler materials such as tungsten to fill the vias.
However, while tungsten can be used successfully as a via filler material, it has a higher electrical resistance than aluminum, making it less desirable as a filler material and/or as an overlying metal interconnect layer.
In view of such less than satisfactory results with the use of tungsten in filling vias, there has been renewed interest in the use of aluminum as a filler material for vias, leading to the development of CVD or sputter deposition processes wherein at least a part of the deposition is carried out at temperatures of at least 400.degree. C. or higher.
While the use of such higher deposition temperatures has resulted in the satisfactory filling of such vias with aluminum,, the resulting aluminum layer concurrently formed over the insulation layer containing the vias may not be satisfactory for use in forming a patterned interconnect. Such high temperature-deposited aluminum layers have been found to have electro migration and stress migration limitations. Furthermore., the resulting large grains formed in the aluminum deposited at such high temperatures interferes with subsequent patterning and line etching of the aluminum layer resulting in poor line definition.
It would, therefore, be desirable to provide a process for filling a via in an insulating layer of an integrated circuit structure with an aluminum plug followed by formation of a patternable conductive metal layer over the insulation layer to provide an electrical connection to the aluminum plug in the via.